Logical Intrinsics

The prototypes for Intel® Streaming SIMD Extensions (Intel® SSE) intrinsics for logical operations are in the xmmintrin.h header file.

The results of each intrinsic operation are placed in a register. This register is illustrated for each intrinsic with R0-R3. R0, R1, R2 and R3 each represent one of the four 32-bit pieces of the result register.

Intrinsic Name	Operation	Corresponding Intel® SSE Instruction
_mm_and_ps	Bitwise AND	ANDPS
_mm_andnot_ps	Bitwise ANDNOT	ANDNPS
_mm_or_ps	Bitwise OR	ORPS
_mm_xor_ps	Bitwise Exclusive OR	XORPS

__m128 _mm_and_ps(__m128 a, __m128 b)

Computes the bitwise AND of the four SP FP values of a and b.

R0	R1	R2	R3
a0 & b0	a1 & b1	a2 & b2	a3 & b3

__m128 _mm_andnot_ps(__m128 a, __m128 b)

Computes the bitwise AND-NOT of the four SP FP values of a and b.

R0	R1	R2	R3
~a0 & b0	~a1 & b1	~a2 & b2	~a3 & b3

__m128 _mm_or_ps(__m128 a, __m128 b)

Computes the bitwise OR of the four SP FP values of a and b.

R0	R1	R2	R3
a0 \| b0	a1 \| b1	a2 \| b2	a3 \| b3

__m128 _mm_xor_ps(__m128 a, __m128 b)

Computes bitwise XOR (exclusive-or) of the four SP FP values of a and b.

R0	R1	R2	R3
a0 ^ b0	a1 ^ b1	a2 ^ b2	a3 ^ b3