Retrieves the processor features.
IppStatus ippGetCpuFeatures(Ipp64u* pFeaturesMask, Ipp32u pCpuidInfoRegs[4]);
pFeaturesMask |
Pointer to the features mask. It can has the value ippCPUID_GETINFO_A. |
pCpuidInfoRegs |
Pointer to the 4-element vector for data from the registers eax, ebx, ecx, edx of the function CPUID.1. |
The function ippGetCpuFeatures is declared in the ippcore.h file. This function retrieves some of the CPU features returned by the function CPUID.1 and stores them consecutively in the mask pFeaturesMask. The table below lists the features stored in the mask.
If pFeaturesMask hasn't any value on input, then the function retrieves the features in accordance with eax=1 and ecx=0. If pFeaturesMask is set to ippCPUID_GETINFO_A, then the function retrieves the features in accordance with the input values of the registers eax and ecx that are specified in this case by the pCpuidInfoRegs[0] and pCpuidInfoRegs[2] respectively.
Mask Value | Bit Name | Feature | Mask Bit Number |
---|---|---|---|
1 | ippCPUID_MMX |
MMXTM technology |
0 |
2 | ippCPUID_SSE |
Intel® Streaming SIMD Extensions |
1 |
4 | ippCPUID_SSE2 |
Intel® Streaming SIMD Extensions 2 |
2 |
8 | ippCPUID_SSE3 |
Intel® Streaming SIMD Extensions 3 |
3 |
16 | ippCPUID_SSSE3 |
Supplemental Intel® Streaming SIMD Extensions |
4 |
32 | ippCPUID_MOVBE |
MOVBE instruction is supported |
5 |
64 | ippCPUID_SSE41 |
Intel® Streaming SIMD Extensions 4.1 |
6 |
128 | ippCPUID_SSE42 |
Intel® Streaming SIMD Extensions 4.2 |
7 |
256 | ippCPUID_AVX |
The processor supports Intel® Advanced Vector Extensions (Intel® AVX) instruction set | 8 |
512 | ippAVX_ENABLEDBYOS |
The operating system supports Intel® AVX | 9 |
1024 | ippCPUID_AES |
Intel® Advanced Encryption Standard (AES) instructions set |
10 |
2048 | ippCPUID_CLMUL |
PCLMULQDQ instruction is supported |
11 |
Optimization Notice |
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The Intel® Integrated Performance Primitives (Intel® IPP) library contains functions that are more highly optimized for Intel microprocessors than for other microprocessors. While the functions in the Intel® IPP library offer optimizations for both Intel and Intel-compatible microprocessors, depending on your code and other factors, you will likely get extra performance on Intel microprocessors. While the paragraph above describes the basic optimization approach for the Intel® IPP library as a whole, the library may or may not be optimized to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include Intel® Streaming SIMD Extensions 2 (Intel® SSE2), Intel® Streaming SIMD Extensions 3 (Intel® SSE3), and Supplemental Streaming SIMD Extensions 3 (Intel® SSSE3) instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Intel recommends that you evaluate other library products to determine which best meets your requirements. |
Additionally all features returned by the function CPUID.1 can be stored in the 4-element vector pCpuidInfoRegs where each next element contains data from one of the registers eax, ebx, ecx, edx respectively. If these data are not required, the pointer pCpuidInfoRegs must be set to NULL.
ippStsNoErr |
Indicates no error. |
ippStsNullPtrErr |
Indicates an error condition when the pFeaturesMask pointer is NULL. |
ippStsNotSupportedCpu |
Indicates that processor is not supported. |
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