Enables or disables flush-to-zero mode.
IppStatus ippSetFlushToZero(int value, unsigned int* pUMask);
value |
Switch to set or clear the corresponding bit of the MXCSR register. |
pUMask |
Pointer to the current underflow exception mask; may be set to NULL. |
The function ippSetFlushToZero is declared in the ippcore.h file. This function enables (when the value is not equal to 0) or disables (when the value is equal to 0) a flush-to-zero (FTZ) mode of processors that support Streaming SIMD Extensions (SSE) instructions. The FTZ mode controls the masked response to a SIMD floating-point underflow condition. The FTZ mode is provided primarily for performance reasons. At the cost of a slight precision loss, FTZ mode enables faster execution of applications where underflows are common and rounding the underflow result to zero can be tolerated.
FTZ mode is possible only when the mask register is in a certain state. The ippSetFlushToZero function checks and changes this state if necessary. After disabling the FTZ mode, you can restore the initial mask register state. To do this, you must declare a variable of unsigned integer type in your application and point to it the parameter pUMask of the ippSetFlushToZero function. The initial state of mask register is saved in this location and can be restored later. If you do not need to restore the initial mask state, then the pointer pUMask may be set to NULL.
ippStsNoErr |
Indicates no error. |
ippStsCpuNotSupportedErr |
Indicates an error condition when the FTZ mode is not supported by the processor. |
Optimization Notice |
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The Intel® Integrated Performance Primitives (Intel® IPP) library contains functions that are more highly optimized for Intel microprocessors than for other microprocessors. While the functions in the Intel® IPP library offer optimizations for both Intel and Intel-compatible microprocessors, depending on your code and other factors, you will likely get extra performance on Intel microprocessors. While the paragraph above describes the basic optimization approach for the Intel® IPP library as a whole, the library may or may not be optimized to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include Intel® Streaming SIMD Extensions 2 (Intel® SSE2), Intel® Streaming SIMD Extensions 3 (Intel® SSE3), and Supplemental Streaming SIMD Extensions 3 (Intel® SSSE3) instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Intel recommends that you evaluate other library products to determine which best meets your requirements. |
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